Fundamentals of Failure Diagrams in MADE

This article explains the theory behind the Failure Diagram concepts in MADE.

Definitions of the Failure Diagram

The Failure Diagrams use logical gates to create failure paths.

• If there is an AND Gate, this means that the causes are grouped in one failure path.
• If there is an OR Gate, or no gate at all, this means that the failure paths are separate and will appear as different lines in the FMEA/FMECA report.

Regarding the links between different levels of the Failure Diagram (Cause – Mechanism – Fault/Failure Condition), these are governed by the following concepts:

• Causal Strength
• Causal Probability
• Progression Rate

Causal Strength

The degree to which a parent node (Fault) influences a child node (Functional Failure of Output Flow) in the failure diagram.

• High CS (Causal Strength) paths reveal "keystone" components where investment in redundancy yields maximum risk reduction.
• Example: in a semiconductor fab, focusing on (CS > 0.8) nodes reduced unplanned downtime by 37%.

Causal Probability

The probability that a specific causal relationship (Mechanism to Fault) will activate under given conditions.

Progression Rate

The speed at which a failure propagates through the system once initiated.

The progression rate (PR) is particularly valuable in risk analysis because it introduces time-dependent quantification of failure escalation — a critical dimension missing in traditional FMEA.